Overview of PRIMEPOWER 2000/1000/800 hardware

Fujitsu Scientific and Technical Journal

Volumn 36, Issue 2, 2000, Pages 121-127

  Izuta, Naoki ^a,b   Watabe, Toru ^b,c   Shimizu, Toshiyuki ^b,d   Ichihashi, Tetsuhiko ^b,e  

^a UNIVERSITY OF TOKYO   (Japan)

^b FUJITSU LABORATORIES LTD   (Japan)

^c AOYAMA GAKUIN UNIVERSITY   (Japan)

^d TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^e MEIJI UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; CLIENT SERVER COMPUTER SYSTEMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SYSTEM RECOVERY; ERROR CORRECTION; INPUT OUTPUT PROGRAMS; INTERFACES (COMPUTER); MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS;

CENTRAL PROCESSING UNITS; HOT SWAP FUNCTIONS; PRIMEPOWER HARDWARE; SOLARIS OPERATING SYSTEMS; SYMMETRIC MULTIPROCESSING;

INTERNET;

EID: 0034460437     PISSN: 00162523     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (1)

1. SPARC64 III, Microprocessor Report, December 8, 1997. http://www.hal.com/home/sparc643_mda. html