A 65V, 0.56 mΩ.cm2 Resurf LDMOS in a 0.35 μm CMOS process

IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)

Volumn , Issue , 2000, Pages 335-338

  Zhu, R ^a   Parthasarathy, V ^a   Bose, A ^a   Baird, R ^a   Khemka, V ^a   Roggenbauer, T ^a   Collins, D ^a   Chang, S ^a   Hui, P ^a   Ger, M L ^a   Zunino, M ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; INTEGRATED CIRCUIT MANUFACTURE; ION IMPLANTATION; OXIDATION; PERFORMANCE; POWER ELECTRONICS; SUBSTRATES;

CMOS PROCESS; LDMOS DEVICES;

MOS DEVICES;

EID: 0034449133     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)