Effective null pointer check elimination utilizing hardware trap

International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS

Volumn , Issue , 2000, Pages 139-149

  Kawahito, M ^a   Komatsu, H ^a   Nakatani, T ^a  

^a IBM RESEARCH TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; ITERATIVE METHODS; JAVA PROGRAMMING LANGUAGE; OPTIMIZATION; PROGRAM COMPILERS;

HARDWARE TRAP; NULL POINTER CHECKS;

COMPUTER PROGRAM LISTINGS;

EID: 0034445504     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/378993.379234     Document Type: Conference Paper

References (15)