Numerical analysis of electron tunneling through hetero-interfaces and Schottky barriers in heterostructure devices

Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

Volumn , Issue , 2000, Pages 129-132

  Lyumkis, E ^a   Mickevicius, R ^a   Penzin, O ^a   Polsky, B ^a   El Sayed, K ^a  

^a Integrated Systems Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GATES (TRANSISTOR); HETEROJUNCTIONS; HIGH ELECTRON MOBILITY TRANSISTORS; MATHEMATICAL MODELS; SCHOTTKY BARRIER DIODES; SEMICONDUCTING INDIUM GALLIUM ARSENIDE;

HETEROSTRUCTURE DEVICES;

ELECTRON TUNNELING;

EID: 0034441466     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)