A 3.2GOPS multiprocessor DSP for communication applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 70-71

  Williams, J ^a   Singh, K J ^a   Nicol, C ^a   Sackinger E ^a   Daubert, S ^a   Micca, E ^a   Moturi, M ^a   Knobloch, J ^a   Brinthaupt, D ^a   Ackland, B ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; DIGITAL SIGNAL PROCESSING; MICROPROCESSOR CHIPS; NETWORK PROTOCOLS; PHASE SHIFT; REDUCED INSTRUCTION SET COMPUTING; SOFTWARE ENGINEERING; TELECOMMUNICATION TRAFFIC;

PROGRAMMABLE PROCESSING ELEMENTS (PE);

MULTIPROCESSING SYSTEMS;

EID: 0034431449     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. Software environment for a multiprocessor DSP
2. A sing̈le-chip 1.6 billion 16-b MAC/s multiprocessor DSP