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Volumn 1, Issue , 2000, Pages 13-19

From interpreted Petri net specification to reprogrammable logic controller design

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; DISCRETE TIME CONTROL SYSTEMS; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; LOGIC DESIGN; PETRI NETS;

EID: 0034430788     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (22)

References (18)
  • 2
    • 0001885951 scopus 로고
    • Parallel controller implementation using standard PLD software
    • W.R. Moore, W.Luk (eds.). Abingdon EE&CS Books, Abingdon, England
    • (1991) FPGAs , pp. 296-304
    • Adamski, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.