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Volumn 30, Issue 1, 2000, Pages 1-11
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Fast hypergraph min-cut algorithm for circuit partitioning
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
ELECTRIC NETWORK ANALYSIS;
ELECTRIC NETWORK SYNTHESIS;
INTEGRATED CIRCUIT LAYOUT;
INTERCONNECTION NETWORKS;
MATHEMATICAL MODELS;
CIRCUIT PARTITIONING;
FLOW-BASED ALGORITHMS;
MIN-CUT PARTITIONING;
VLSI CIRCUITS;
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EID: 0034427497
PISSN: 01679260
EISSN: None
Source Type: Journal
DOI: 10.1016/S0167-9260(00)00008-0 Document Type: Article |
Times cited : (32)
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References (12)
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