Krylov-subspace methods for reduced-order modeling in circuit simulation

Journal of Computational and Applied Mathematics

Volumn 123, Issue 1-2, 2000, Pages 395-421

  Freund, Roland W ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

Arnoldi process; Lanczos algorithm; Linear dynamical system; Pad approximation; Passivity; Positive real function; Stability; Transfer function; VLSI interconnect

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; DIFFERENTIAL EQUATIONS; INTERCONNECTION NETWORKS; LAPLACE TRANSFORMS; LINEAR INTEGRATED CIRCUITS; MATRIX ALGEBRA; TRANSFER FUNCTIONS; VECTORS; VLSI CIRCUITS;

ARNOLDI PROCESS; KRYLOV SUBSPACE METHODS; LANCZOS ALGORITHM; LINEAR DYNAMICAL SYSTEM; LINEAR SUBCIRCUITS; PADE APPROXIMATION; PASSIVITY; POSITIVE REAL FUNCTION; REDUCED ORDER MODELING;

APPROXIMATION THEORY;

EID: 0034322885     PISSN: 03770427     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0377-0427(00)00396-4     Document Type: Article

References (31)

1. J.I. Aliaga, D.L. Boley, R.W. Freund, V. Hernández, A Lanczos-type method for multiple starting vectors, Math. Comp. 69 (2000) 1577-1601; Also available online from http://cm.bell-labs.com/cs/doc/98 .
2. Anderson B.D.O., Vongpanitlerd S. Network Analysis and Synthesis. 1973;Prentice-Hall, Englewood Cliffs, NJ.
3. Arnoldi W.E. The principle of minimized iterations in the solution of the matrix eigenvalue problem. Quart. Appl. Math. 9:1951;17-29.
4. Z. Bai, P. Feldmann, R.W. Freund, How to make theoretically passive reduced-order models passive in practice, in: Proceedings of IEEE 1998 Custom Integrated Circuits Conference, IEEE, Piscataway, NJ, 1998, pp. 207-210.
5. Baker G.A. Jr., Graves-Morris P. Padé Approximants. 2nd Edition:1996;Cambridge University Press, New York.
6. Chirlian P.M. Integrated and Active Network Analysis and Synthesis. 1967;Prentice-Hall, Englewood Cliffs, NJ.
7. I.M. Elfadel, D.D. Ling, Zeros and passivity of Arnoldi-reduced-order models for interconnect networks, in: Proceedings of the 34th ACM / IEEE Design Automation Conference, ACM, New York, 1997, pp. 28-33.
8. Feldmann P., Freund R.W. Efficient linear circuit analysis by Padé approximation via the Lanczos process. IEEE Trans. Computer-Aided Design. 14:1995;639-649.
9. P. Feldmann, R.W. Freund, Reduced-order modeling of large linear subcircuits via a block Lanczos algorithm, in: Proceedings of the 32nd ACM / IEEE Design Automation Conference, ACM, New York, 1995, pp. 474-479.
10. P. Feldmann, R.W. Freund, Numerical Simulation of Electronic Circuits: State-of-the-Art Techniques and Challenges, Course Notes, 1995. Available online from http://cm.bell-labs.com/who/freund .
11. P. Feldmann, R.W. Freund, T. Young, Interconnect Extraction and Analysis in High-Frequency, Sub-Micron, Digital VLSI Design, Tutorial at the 35th Design Automation Conference, San Francisco, CA, 1998. Available online from http://cm.bell-labs.com/who/freund .
12. Freund R.W. Computation of matrix Padé approximations of transfer functions via a Lanczos-type process. Chui C.K., Schumaker L.L. Approximation Theory VIII, Vol. 1: Approximation and Interpolation. 1995;215-222 World Scientific, Singapore.
13. R.W. Freund, Reduced-order modeling techniques based on Krylov subspaces and their use in circuit simulation, in: B.N. Datta (Ed.), Applied and Computational Control, Signals, and Circuits, Vol. 1, Birkhäuser, Boston, 1999, pp. 435-498.
14. R.W. Freund, Passive reduced-order models for interconnect simulation and their computation via Krylov-subspace algorithms, in: Proceedings of the 36th ACM / IEEE Design Automation Conference, ACM, New York, 1999, pp. 195-200.
15. R.W. Freund, P. Feldmann, Reduced-order modeling of large passive linear circuits by means of the SyPVL algorithm, in: Tech. Dig. 1996 IEEE / ACM International Conference on Computer-Aided Design, IEEE Computer Society Press, Los Alamitos, CA, 1996, pp. 280-287.
16. R.W. Freund, P. Feldmann, The SyMPVL algorithm and its applications to interconnect simulation, in: Proceedings of the 1997 International Conference on Simulation of Semiconductor Processes and Devices, IEEE, Piscataway, NJ, 1997, pp. 113-116.
17. R.W. Freund, P. Feldmann, Reduced-order modeling of large linear passive multi-terminal circuits using matrix-Padé approximation, in: Proc. Design, Automation and Test in Europe Conference 1998, IEEE Computer Society Press, Los Alamitos, CA, 1998, pp. 530-537.
18. Guillemin E.A. Synthesis of Passive Networks. 1957;Wiley, New York.
19. K.J. Kerns, A.T. Yang, Preservation of passivity during RLC network reduction via split congruence transformations, in: Proceedings of the 34th ACM / IEEE Design Automation Conference, ACM, New York, 1997, pp. 34-39.
20. Kim S.-Y., Gopal N., Pillage L.T. Time-domain macromodels for VLSI interconnect analysis. IEEE Trans. Computer-Aided Design. 13:1994;1257-1270.
21. Lanczos C. An iteration method for the solution of the eigenvalue problem of linear differential and integral operators. J. Res. Nat. Bur. Standards. 45:1950;255-282.
22. A. Odabasioglu, Provably passive RLC circuit reduction, M.S. Thesis, Department of Electrical and Computer Engineering, Carnegie Mellon University, 1996.
23. A. Odabasioglu, M. Celik, L.T. Pileggi, PRIMA: passive reduced-order interconnect macromodeling algorithm, in: Tech. Dig. 1997 IEEE / ACM International Conference on Computer-Aided Design, IEEE Computer Society Press, Los Alamitos, CA, 1997, pp. 58-65.
24. L.T. Pileggi, Coping with RC(L) interconnect design headaches, in: Tech. Dig. 1995 IEEE / ACM International Conference on Computer-Aided Design, IEEE Computer Society Press, Los Alamitos, CA, 1995, pp. 246-253.
25. Pillage L.T., Rohrer R.A. Asymptotic waveform evaluation for timing analysis. IEEE Trans. Computer-Aided Design. 9:1990;352-366.
26. V. Raghavan, J.E. Bracken, R.A. Rohrer, AWESpice: A general tool for the accurate and efficient simulation of interconnect problems, in: Proceedings of the 29th ACM / IEEE Design Automation Conference, ACM, New York, 1992, pp. 87-92.
27. Rohrer R.A., Nosrati H. Passivity considerations in stability studies of numerical integration algorithms. IEEE Trans. Circuits Syst. 28:1981;857-866.
28. Saad Y. Iterative Methods for Sparse Linear Systems. 1996;PWS Publishing Company, Boston.
29. Sangiovanni-Vincentelli A.L. Circuit simulation. Antognetti P., Pederson D.O., de Man D. Computer Design Aids for VLSI Circuits. 1981;19-112 Sijthoff & Noordhoff, Alphen aan de Rijn, The Netherlands.
30. Vlach J., Singhal K. Computer Methods for Circuit Analysis and Design. 2nd Edition:1993;Van Nostrand Reinhold, New York.
31. Wohlers M.R. Lumped and Distributed Passive Networks. 1969;Academic Press, New York.