Processing technology for integrated passive devices

Solid State Technology

Volumn 43, Issue 11, 2000, Pages 84-86,-88,-90

  Arbuckle, Brian ^a   Logan, Elizabeth ^a   Pedder, David ^a  

^a Intarsia Corp   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COST BENEFIT ANALYSIS; PRINTED CIRCUIT BOARDS; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTING SILICON; WIRELESS TELECOMMUNICATION SYSTEMS;

INTEGRATED PASSIVE DEVICES; MONOLITHIC SILICON INTEGRATION; SYSTEM-ON-A-CHIP LEVEL;

INTEGRATED CIRCUIT LAYOUT;

EID: 0034317049     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Article

References (0)