Discharge mechanisms modeling in LPCVD silicon nanocrystals using C-V and capacitance transient techniques

Superlattices and Microstructures

Volumn 28, Issue 5-6, 2000, Pages 493-500

  Busseret, C ^a   Souifi, A ^a   Baron, T ^a   Guillot, G ^a   Martin, F ^b   Semeria, M N ^b   Gautier, J ^b  

^a UNIVERSITÉ DE LYON   (France)

^b CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE MEASUREMENT; CHEMICAL VAPOR DEPOSITION; ELECTRON TUNNELING; HYSTERESIS; MATHEMATICAL MODELS; MOS CAPACITORS; NANOSTRUCTURED MATERIALS; SEMICONDUCTOR QUANTUM DOTS; VOLTAGE MEASUREMENT;

BARRIER HEIGHTS; CAPACITANCE TRANSIENT TECHNIQUES; CAPACITANCE VOLTAGE CHARACTERISTICS; DISCHARGE MECHANISM;

SEMICONDUCTING SILICON;

EID: 0034314892     PISSN: 07496036     EISSN: None     Source Type: Journal    
DOI: 10.1006/spmi.2000.0953     Document Type: Article

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