Electro-thermal analysis of paralleled bipolar devices

Microelectronics Journal

Volumn 31, Issue 9, 2000, Pages 753-758

  D'Amore, D ^a   Maffezzoni, P ^a  

^a POLITECNICO DI MILANO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; NONLINEAR NETWORK ANALYSIS; NONLINEAR NETWORK SYNTHESIS; SEMICONDUCTOR DEVICE MODELS; THERMODYNAMIC STABILITY;

BIPOLAR JUNCTION TRANSISTORS (BJT); ELECTRO-THERMAL MODELS;

BIPOLAR TRANSISTORS;

EID: 0034301907     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2692(00)00055-0     Document Type: Article

References (8)

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