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Volumn 87, Issue 9, 2000, Pages 1053-1063

A low-cost quadrature decoder/counter interface integrated circuit for AC induction motor server control

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FILTERS; MICROPROCESSOR CHIPS; SPURIOUS SIGNAL NOISE;

EID: 0034286575     PISSN: 00207217     EISSN: None     Source Type: Journal    
DOI: 10.1080/002072100412993     Document Type: Article
Times cited : (6)

References (9)
  • 2
    • 0011772306 scopus 로고    scopus 로고
    • Hewlett Packard, Quadrature Decoder/Counter interface ICs HCTL-2000, 2016, 2020
    • Hewlett Packard, Quadrature Decoder/Counter interface ICs HCTL-2000, 2016, 2020.
  • 3
    • 0028484336 scopus 로고
    • Microprocessor and digital IC/s for motion control
    • Hoang, L.-H., 1994, Microprocessor and digital IC/s for motion control. Proceedings of the IEEE, 82, 1140-1163.
    • (1994) Proceedings of the IEEE , vol.82 , pp. 1140-1163
    • Hoang, L.-H.1
  • 7
    • 0031101190 scopus 로고    scopus 로고
    • Digital design of discrete exponential bidirectional associative memory
    • Wang, C.-C., and Fan, C.-L., 1997, Digital design of discrete exponential bidirectional associative memory. Journal of VLSI Signal Processing, 15, 247-257.
    • (1997) Journal of VLSI Signal Processing , vol.15 , pp. 247-257
    • Wang, C.-C.1    Fan, C.-L.2
  • 8
    • 0011716458 scopus 로고    scopus 로고
    • A quadrature decoder/counter interface IC for AC induction motor server control
    • Nantou, Taiwan
    • Wang, C.-C., and Tseng, Y.-L., 1998, A quadrature decoder/counter interface IC for AC induction motor server control. The 9th VLSI Design/CAD Symposium, Nantou, Taiwan, pp. 281-84.
    • (1998) The 9th VLSI Design/CAD Symposium , pp. 281-284
    • Wang, C.-C.1    Tseng, Y.-L.2
  • 9
    • 4243937112 scopus 로고    scopus 로고
    • A low-power and high-speed dynamic PLA circuit configuration for single-clock CMOS
    • Taichung, Taiwan
    • Wang, C.-C., Wu, C.-F., Hwang, R.-T, and Kao, C.-H., 1997, A low-power and high-speed dynamic PLA circuit configuration for single-clock CMOS. 1997 National Computer Symposium (NCS'97), vol. 2, Taichung, Taiwan, pp. C-57-C-62.
    • (1997) 1997 National Computer Symposium (NCS'97) , vol.2
    • Wang, C.-C.1    Wu, C.-F.2    Hwang, R.-T.3    Kao, C.-H.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.