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Volumn 147, Issue 9, 2000, Pages 3482-3486

Reduction of oxide tub isolation stress using a silicon nitride liner

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; SILICON NITRIDE; STRESS ANALYSIS;

EID: 0034272572     PISSN: 00134651     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.1393924     Document Type: Article
Times cited : (3)

References (12)
  • 1
    • 12944311287 scopus 로고
    • Lattice Press, Sunset Beach, CA
    • S. Wolf, in Silicon Processing for the VLSI ERA, Vol. 2, pp. 13-17, Lattice Press, Sunset Beach, CA (1990).
    • (1990) Silicon Processing for the VLSI ERA , vol.2 , pp. 13-17
    • Wolf, S.1
  • 9
    • 12944313086 scopus 로고
    • Ph.D. Thesis, Delft, Technische Hogeschool, Delft, The Netherlands
    • C. G. M. Meijer, Ph.D. Thesis, Delft, Technische Hogeschool, p. 72, Delft, The Netherlands (1982).
    • (1982) , pp. 72
    • Meijer, C.G.M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.