Compiler analysis for cache coherence: interprocedural array data-flow analysis and its impact on cache performance

IEEE Transactions on Parallel and Distributed Systems

Volumn 11, Issue 9, 2000, Pages 879-896

  Choi, Lynn ^a,b   Yew, Pen Chung ^a,c  

^a IEEE

^b Korea University   (South Korea)

^c UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; COMPUTER SIMULATION; DATA FLOW ANALYSIS; PARALLEL PROCESSING SYSTEMS; PERFORMANCE;

CACHE COHERENCE; INTERPROCEDURAL ARRAY; LOCALITY PRESERVING ANALYSIS; SHARED MEMORY MULTIPROCESSORS; STATE REFERENCE DETECTION;

PROGRAM COMPILERS;

EID: 0034262613     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.879772     Document Type: Article

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