Hardware/software co-design of run-time schedulers for real-time systems

Design Automation for Embedded Systems

Volumn 6, Issue 1, 2000, Pages 89-144

  Mooney III, Vincent John ^a   De Micheli, Giovanni ^b  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; C (PROGRAMMING LANGUAGE); COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SOFTWARE; CONSTRAINT THEORY; DATA FLOW ANALYSIS; REAL TIME SYSTEMS; ROBOTICS; SYSTEMS ANALYSIS;

HARDWARE-SOFTWARE CO-DESIGN; RUN TIME SCHEDULER;

COMPUTER AIDED DESIGN;

EID: 0034262292     PISSN: 09295585     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1008941525972     Document Type: Article

References (40)

1. M. Abid, A. Changuel and A. Jerraya, "Exploration of Hardware/Software Design Space through a Codesign of Robot Arm Controller," European Design Automation Conference, pp. 42-47, September 1996.
2. J. K. Adams and D. E. Thomas, "Multiple-Process Behavioral Synthesis for Mixed Hardware-Software Systems," International Symposium on System Synthesis, pp. 10-15, September 1995.
3. N. Audsley, A. Burns, M. Richardson, K. Tindell and A. J. Wellings, "Applying new scheduling theory to static priority pre-emptive scheduling," Software Engineering Journal, pp. 284-292, September 1993.
4. N. Audsley, A. Burns, R. Davis, K. Tindell and A. J. Wellings, "Fixed Priority Pre-emptive scheduling: A Historical Perspective," Real-Time Systems, (8):173-198, 1995.
5. F. Balarin, M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, E. Sentovich, K. Suzuki and B. Tabbara, Hardware-Software Co-Design of Embedded Systems The Polis Approach, Kluwer Academic Publishers, Norwell, MA, 1997.
6. F. Balarin, K. Petty, A. Sangiovanni-Vincentelli and P. Varaiya, "Formal Verification of the PATHO Real-Time Operating System," Proceedings of the 33rd Conference on Decision and Control, CDC '94, December 1994.
7. nd Design Automation Conference, pp. 568-571, June 1996.
8. st Design Automation Conference, pp. 1-4, June 1994.
9. P. H. Chou, R. B. Ortega, and G. Borriello, "The Chinook Hardware/Software Co-Synthesis System," International Symposium on System Synthesis, pp. 22-27, September 1995.
10. C. N. Coelho Jr. and G. De Micheli, "Analysis and Synthesis of Concurrent Digital Circuits Using Control-Flow Expressions," IEEE Transactions on CAD/ICAS, Vol. 15, No. 8, pp. 854-876. August 1996, and Technical Report CSL-TR-96-694, http://elib.stanford.edu/Dienst/UI/2.0/Describe/stanford.cs%2fCSL-TR-96-694, Stanford, CA, April, 1996.
11. C. N. Coelho Jr., Analysis and Synthesis of Concurrent Digital Systems Using Control-Flow Expressions, Ph.D. Thesis, Technical Report CSL-TR-96-690, http://elib.stanford.edu/Dienst/UI/2.0/Describe/ stanford.cs%2fCSL-TR-96-690, Stanford, CA, March, 1996.
12. T. Cormen, C. Leiserson and R. Rivest, Introduction to Algorithms, The MIT Press, Cambridge, 1990, pg. 35.
13. th Design Automation Conference, pp. 703-708, June 1997.
14. G. DeMicheli and M. Sami, editors, Hardware/Software Co-Design, Kluwer Academic Publishers, Norwell, MA, 1996.
15. G. De Micheli, Synthesis and Optimization of Digital Circuits, McGraw Hill, Inc., New York, NY, 1994, pp. 208-211.
16. R. Ernst, J. Henkel, Th. Benner, W. Ye, U. Holtmann, D. Herrmann and M. Trawny, "The COSYMA environment for hardware/software cosynthesis of small embedded systems," Microprocessors and Microsystems, 20, pp. 159-166, 1996.
17. M. Garey and D. Johnson, Computers and Intractability A Guide to the Theory of NP-Completeness, W. H. Freeman and Company, N.Y, 1979, pg. 239.
18. R. K. Gupta, Co-Synthesis of Hardware and Software for Digital Embedded Systems, Kluwer Academic Publishers, Boston, MA, 1995.
19. J. Henkel, R. Ernst, "The Interplay of Run-Time Estimation and Granularity in HW/SW Partitioning," 4th International Workshop on Hardware/Software Co-Design, Pittsburgh, 1996.
20. J. Henkel, Th. Benner, R. Ernst, W. Ye, N. Serafimov and G. Glawe, "COSYMA: A Software-Oriented Approach to Hardware/Software Co-Design," The Journal of Computer and Software Engineering, Vol. 2, No. 3, pp. 293-314, 1994.
21. F. Hillier and G. Lieberman, Introduction to Operations Research, 6th edition, McGraw-Hill, Inc., New York, 1995, pp. 424-469.
22. M. Humphrey, G. Wallace and J. Stankovic, "Kernel-Level Threads for Dynamic, Hard Real-Time Environment," 16th IEEE Real Time Systems Symposium, pp. 38-48, 1995.
23. D. Knapp, Behavioral Synthesis: Digital System Design Using the Synopsys Behavioral Compiler, Prentice Hall, Upper Saddle River, NJ, 1996.
24. D. C. Ku and G. De Micheli, High Level Synthesis of ASICs Under Timing and Synchronization Constraints, Kluwer Academic Publishers, Norwell, MA, 1992.
25. A. W. Leigh, Real Time Software For Small Systems, Sigma Press, Wilmslow, U.K., 1988.
26. C. Liu and J. Layland, "Scheduling algorithms for multiprogramming in a hard-real time environment," Journal of the ACM, 20(1):46-61, January 1973.
27. Y. Li, S. Malik and A. Wolf, "Performance Estimation of Embedded Software with Instruction Cache Modeling", Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, pp. 380-387, November, 1995.
28. S. Malik, W. Wolf, A. Wolf, Y. Li and T. Yen, "Performance Analysis of Embedded Systems," in G. De Micheli and M. Sami, editors, Hardware/Software Co-Design, pp. 45-74, Kluwer Academic Publishers, Norwell, MA, 1996.
29. V. Mooney, C. Coelho, T. Sakamoto and G. De Micheli, "Synthesis From Mixed Specifications," European Design Automation Conference, pp. 114-119, September 1996.
30. V. Mooney, T. Sakamoto and G. De Micheli, "Run-Time Scheduler Synthesis For Hardware-Software Systems and Application to Robot Control Design," 5th Int'l Workshop on Hardware/Software Co-Design, pp. 95-99, Braunschweig, Germany, March 1997.
31. V. Mooney and G. De Micheli, "Real-Time Analysis and Priority Scheduler Generation For Hardware-Software Systems with a Synthesized Run-Time System," Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, pp. 605-612, November, 1997.
32. V. Mooney G. De Micheli, Hardware/Software Co-Design of Run-Time Schedulers for Real-Time Systems, Technical Report CSL-TR-97-739, http://elib.stanford.edu/Dienst/UI/2.0/Describe/stanford.cs%2fCSL-TR-97-739, Stanford, CA, November 1997. (This technical report is an early version of this journal paper.)
33. V. Mooney, Hardware/Software Co-Design of Run-Time Systems, Ph.D. Thesis, Technical Report CSL-TR-98-762, http://elib.stanford.edu/Dienst/UI/2.0/Describe/stanford.cs%2fCSL-TR-98-762, Stanford, CA, June 1998.
34. S. Narayan, F. Vahid and D. Gajski, "System Specification with the SpecCharts Language," IEEE Design & Test of Computers, pp. 6-13, December 1992.
35. S. Prakash and A. C. Parker, "SOS: Synthesis of Application-Specific Heterogeneous Multiprocessor Systems," Journal of Parallel and Distributed Computing, Vol. 16, pp. 338-351, December, 1992.
36. K. Ramamritham, "Allocation and Scheduling of Precedence-Related Periodic Tasks," IEEE Proceedings on Parallel and Distributed Systems, 6(4):412-420, April 1995.
37. L. Sha, R. Rajkumar and S. Sathaye, "Generalized rate monotonie scheduling theory: a framework for developing real-time systems," Proceedings of the IEEE, 82(1):68-82, January 1994.
38. D. Verkest, K. Van Rompaey, I. Bolsens & H. De Man, "CoWare - A Design Environment for Heterogeneous Hardware/Software Systems," Design Automation for Embedded Systems, Vol. 1, No. 4, pp. 357-386, October 1996.
39. T. Yen and W. Wolf, "Performance Estimation for Real-Time Distributed Embedded Systems," Proceedings of International Conference on Computer Design, pp. 64-69, 1995.
40. P. Altenbernd, "Deadline-Monotonic Software Scheduling for the Co-Synthesis of Parallel Hard Real-Time Systems," Proceedings of the European Design and Test Conference, pp. 190-195, 1995.