200-Ms/s 10-mW switched-capacitor filter in 0.5-μm CMOS technology

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 8, 2000, Pages 1215-1219

  Baschirotto, Andrea ^a   Severi, F ^b   Castello, R ^c  

^a UNIVERSITY OF SALENTO   (Italy)

^b Accent srl   (Italy)

^c UNIVERSITY OF PAVIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; ELECTRIC DISTORTION; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POWER SUPPLIES TO APPARATUS; ERROR COMPENSATION; GAIN CONTROL; HARMONIC GENERATION; IIR FILTERS; OPERATIONAL AMPLIFIERS; SWITCHED FILTERS;

COMMON MODE FEEDBACK CIRCUIT; GAIN CONTROL CLOSED LOOP; HARMONIC DISTORTION; OPEN LOOP DC GAIN; PRECISE OPAMP GAIN; SWITCHED CAPACITOR FILTER;

CMOS INTEGRATED CIRCUITS;

EID: 0034250025     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.859513     Document Type: Article

References (13)

1. R. Gregorian and G. C. Temes, Analog MOS Integrated Circuits for Signal Processing. New York, NY: Wiley, 1986.
2. K. Martin and A. S. Sedra, "Effects of the op amp finite gain and bandwidth on the performance of switched-capacitor filters," IEEE Trans. Circuits Syst., vol. CAS-28, pp. 822-829, Aug. 1981.
3. G. C. Temes, "Finite amplifier gain and bandwidth effects in switched-capacitor filters," IEEE J. Solid-State Circuits, vol. SC-15, pp. 358-361, June 1980.
4. F. Op 't Eynde and W. Sansen, "Design and optimisation of CMOS wideband amplifiers," presented at the IEEE Custom Integrated Circuits Conf., 1989, 25.7.
5. _, "A CMOS wideband amplifier with 800Hz gain-bandwidth," presented at the IEEE Custom Integrated Circuits Conference, 1991, 9.1.
6. A. Baschirotto, R. Castello, and F. Montecchi, "A 15 MHz 20 mV BiCMOS switched-capacitor biquad operating with 150 Ms/s sampling frequency," IEEE J. Solid-State Circuits, vol. 30, pp. 1357-1365. Dec. 1995.
7. A. Baschirotto, "Considerations for the design of switched-capacitor circuits using precise-gain operational amplifiers," IEEE Trans. Circuits Syst. - II, vol. 43, pp. 827-832, Dec. 1996.
8. K. Nagaraj, T. R. Viswanathan, K. Singhal, and J. Vlach, "Switched-capacitor circuits with reduced sensitivity to amplifier gain," IEEE Trans. Circuits Syst., vol. CAS-34, pp. 571-574, May 1987.
9. R. Castello, F. Montecchi, F. Rezzi, and A. Baschirotto, "Low-voltage analog filter," IEEE Trans. Circuits Syst. - II, pp. 827-840, Nov. 1995.
10. M. J. Loinaz and B. A. Wooley, "A CMOS multichannel IC for pulse timing measurements with 1mV sensitivity," IEEE J. Solid-State Circuits, vol. 30, pp. 1339-1348, Dec. 1995.
11. P. E. Fleischer and K. R. Laker, "A family of active switched-capacitor biquad building blocks," Bell Syst. Tech. J., vol. 58, pp. 2235-2269, 1979.
12. R. Castello and P. R. Gray, "A high-performance micropower switched-capacitor filter," IEEE J. Solid-State Circuits, vol. SC-20, pp. 1122-1132, Dec. 1985.
13. D. Senderowics, S. F. Dreyer, J. H. Huggins, C. F. Rahim, and C. A. Laber, "A family of differential CMOS analog circuits for a PCM codec filter chip," IEEE J. Solid-State Circuits, vol. SC-17, pp. 1014-1023, Dec. 1981.