Yield and matching implications for static RAM memory array sense-amplifier design

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 8, 2000, Pages 1200-1204

  Lovett, Simon J ^a,b   Gibbs, Gary A ^a   Pancholy, Ashish ^a  

^a CYPRESS SEMICONDUCTOR   (United States)

^b MICRON TECHNOLOGY INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CAPACITANCE; CARRIER MOBILITY; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; FAILURE ANALYSIS; MOSFET DEVICES; RANDOM ACCESS STORAGE; STATISTICAL METHODS;

GATE OXIDE CAPACITANCE; INPUT DIFFERENTIAL VOLTAGE; SENSE AMPLIFIER; STATIC RANDOM ACCESS STORAGE MEMORY ARRAY; SUBTHRESHOLD CURRENT;

INTEGRATED CIRCUIT LAYOUT;

EID: 0034246928     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.859510     Document Type: Article

References (9)

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