Location consistency - a new memory model and cache consistency protocol

IEEE Transactions on Computers

Volumn 49, Issue 8, 2000, Pages 798-813

  Gao, Guang R ^a   Sarkar, Vivek ^b  

^a UNIVERSITY OF DELAWARE   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL LINGUISTICS; COMPUTER ARCHITECTURE; JAVA PROGRAMMING LANGUAGE; MULTIPROCESSING SYSTEMS; NETWORK PROTOCOLS; OPTIMIZATION; PARALLEL ALGORITHMS; PROGRAM COMPILERS; SYNCHRONIZATION;

CACHE CONSISTENCY PROTOCOLS; LOCATION CONSISTENCY; MEMORY CONSISTENCY;

BUFFER STORAGE;

EID: 0034246578     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.868026     Document Type: Article

References (26)

1. S.V. Adve and M.D. Hill, "A Unified Formalization of Four Shared-Memory Models," IEEE Trans. Parallel and Distributed Systems, vol. 3, pp. 613-624, June 1993.
2. B. Bershad, M. Zekauskas, and W. Sawdon, "The Midway Distributed Shared Memory System," Proc. IEEE COMPCON, 1993.
3. R.D. Blumofe, M. Frigo, C.F. Joerg, C.E. Leiserson, and K.H. Randall, "An Analysis of Dag-Consistent Distributed Shared-Memory Algorithms," Proc. Eighth Ann. ACM Symp. Parallel Algorithms and Architectures, pp. 297-308, June 1996.
4. P.B. Hansen, "The Programming Language Concurrent Pascal," IEEE Trans. Software Eng., vol. 1, no. 2, pp. 199-206, June 1975.
5. J.B. Carter, J.K. Bennett, and W. Zwaenepoel, "Implementation and Performance of Munin," Proc. 13th ACM Symp. Operating Systems Principles, pp. 152-164, Oct. 1991.
6. Operating Systems Review, vol. 25, no. 5, 1991.
7. D.E. Culler and J.P. Singh, Parallel Computer Architecture, first ed. Morgan Kaufmann, 1999.
8. F. Darema, D.A. George, V.A. Norton, and G.F. Pfister, "A Single-Program-Multiple-Data Computational Model for EPEX/ FORTRAN," Parallel Computing, vol. 7, pp. 11-24, Apr. 1988.
9. Java in a Nutshell, Paula Ferguson, ed. Sebastopol, Calif.: O'Reilly & Associates, 1996.
10. J. Ferrante, K.J. Ottenstein, and J.D. Warren, "The Program Dependence Graph and Its Use in Optimization," ACM Trans. Programming Languages and Systems, vol. 9, no. 3, pp. 319-349, July 1987.
11. M. Frigo, "The Weakest Reasonable Memory Model," master's thesis, Massachusetts Inst. of Technology, 1998.
12. G.R. Gao and V. Sarkar, "Location Consistency: Stepping beyond the Barriers of Memory Coherence and Serializability," ACAPS Technical Memo 78, School of Computer Science, McGill Univ., Montréal, Québec, Canada, Dec. 1993, revised Dec. 1994.
13. G.R. Gao and V. Sarkar, "Location Consistency: Stepping beyond Memory Coherence Barrier," Proc. 1995 Int'l Conf. Parallel Processing, vol. II, pp. 73-76, Aug. 1995.
14. G.R. Gao and V. Sarkar, "On the Importance of an End-to-End View of Memory Consistency in Future Computer Systems," Proc. Int'l Symp. High Performance Computing, pp. 30-41, 1997.
15. K. Gharachorloo, D. Lenoski, J. Laudon, P. Gibbons, A. Gupta, and J. Hennessy, "Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors," Proc. 17th Ann. Int'l Symp. Computer Architecture, pp. 15-26, May 1990.
16. J.L. Hennessy and D.A. Patterson, Computer Architecture: A Quantitative Approach. Morgan Kaufmann, 1990.
17. J.L. Hennessy and D.A. Patterson, Computer Architecture: A Quantitative Approach, second ed. Morgan Kaufmann, 1996.
18. A.H. Karp and V. Sarkar, "Data Merging for Shared-Memory Multiprocessors," Proc. 26th Hawaii Int'l Conf. System Sciences, Volume I (Architecture), pp. 244-256, Jan. 1993.
19. P. Keleher, A.L. Cox, and W. Zwaenepoel, "Lazy Release Consistency for Software Distributed Shared Memory," Proc. 19th Ann. Int'l Symp. Computer Architecture, pp. 13-21, May 1992.
20. L. Lamport, "How to Make a Multiprocessor Computer that Correctly Executes Multiprocess Programs," IEEE Trans. Computers, vol. 28, no. 9, pp. 690-691, Sept. 1979.
21. D. Lenoski, K. Gharachorloo, J. Laudon, A. Gupta, J. Hennessy, M. Horowitz, and M. Lam, "Design of Scalable Shared-Memory Multiprocessors: The DASH Approach," Digest of Papers, 35th IEEE Computer Society Int'l Conf., COMPCON Spring '90, pp. 62-67, Feb.-Mar. 1990.
22. S. Merali, "Designing and Implementing Memory Consistency Models for Shared-Memory Multiprocessors," master's thesis, McGill Univ., Montréal, Québec, Canada, Apr. 1996.
23. W. Pugh, "The Java Memory Model," http://www.cs.umd.edu/ ∼pugh/java/memoryModel, 1999.
24. V. Sarkar, "A Concurrent Execution Semantics for Parallel Program Graphs and Program Dependence Graphs," Proc. Fifth Int'l Workshop Languages and Compilers for Parallel Computing, pp. 16-30, Aug. 1992.
25. A.C. Shaw, The Logical Design of Operating Systems. Prentice Hall, 1974.
26. P. Tang and P.-C. Yew, "Processor Self-Scheduling for Multiple-Nested Parallel Loops," Proc. 1986 Int'l Conf. Parallel Processing, Feb. 1986.