Temperature cross-sensitivity of Hall plate in submicron CMOS technology

Sensors and Actuators, A: Physical

Volumn 85, Issue 1, 2000, Pages 244-248

  Manic, D ^a   Petr, J ^b   Popovic, R S ^a  

^a EPFL   (Switzerland)

^b Siemens Schweiz AG   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRONICS PACKAGING; SENSITIVITY ANALYSIS; SENSORS; STRESS ANALYSIS; THERMAL EFFECTS; THERMOANALYSIS;

HALL PLATE; PIEZO-HALL EFFECT;

HALL EFFECT DEVICES;

EID: 0034246337     PISSN: 09244247     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0924-4247(00)00399-X     Document Type: Article

References (7)

1. Popovic R.S. Hall Effect Devices. 1991;207 Adam Hilger, Bristol.
2. Sze S.M. Physics of Semiconductor Devices. 1981;23-25 Wiley, New York.
3. Ohta E., Sakata M. Temperature dependence of Hall factor in low-compensated n-type silicon. Jpn. J. Appl. Phys. 17:1978;1795-1804.
4. Halg B. Piezo-Hall coefficients of n-type silicon. J. Appl. Phys. 64:1988;276-282.
5. Tummala R., Rymaszewski E., Klopfenstein A. Microelectronics Packaging Handbook. 1997;II-438 Chapman & Hall, New York.
6. Miura H., Kitano M., Nishimura A., Kawai S. Thermal stress measurement in silicon chips encapsulated in IC plastic packages under temperature cycling. Journal of Electronic Packaging. 115:1993;9-15.
7. van Kessel C.G.M., Gee S.A., Murphy J.J. The quality of die-attachment and its relationship to stresses and vertical die-cracking. IEEE Trans. Compon., Hybrids, Manuf. Technol. 6:1984;414-420.