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Volumn 49, Issue 3-4, 2000, Pages 111-127

Analyzing the switching behavior of ESD-protection transistors by very fast transmission line pulsing

Author keywords

Base transit time; Charged device model (CDM); Compact simulation; Electrostatic discharge; Protection; Very fast transmission line pulser

Indexed keywords

CHARGE COUPLED DEVICES; COMPUTER SIMULATION; ELECTRIC DISCHARGES; ELECTRIC POTENTIAL; FAILURE ANALYSIS; SEMICONDUCTOR DEVICE MODELS; TRANSISTORS; TRANSMISSION LINE THEORY; ELECTRIC EQUIPMENT PROTECTION; ELECTRIC LINES; IONIC CONDUCTION; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; PLASMA APPLICATIONS; SILICON ON INSULATOR TECHNOLOGY; SWITCHING;

EID: 0034238637     PISSN: 03043886     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0304-3886(00)00010-3     Document Type: Article
Times cited : (14)

References (13)
  • 1
    • 0022212124 scopus 로고
    • Transmission line pulsing techniques for circuit modeling of ESD phenomena
    • T.J. Maloney, N. Khurana, Transmission line pulsing techniques for circuit modeling of ESD phenomena, Proceedings of the EOS/ESD Symposium, 1985, pp. 49-54.
    • (1985) Proceedings of the EOS/ESD Symposium , pp. 49-54
    • Maloney, T.J.1    Khurana, N.2
  • 2
    • 0041044215 scopus 로고
    • The dynamics of electrostatic discharge prior to bipolar action related snapback
    • G. Krieger, The dynamics of electrostatic discharge prior to bipolar action related snapback, Proceedings of the EOS/ESD Symposium, 1989, pp. 136-144.
    • (1989) Proceedings of the EOS/ESD Symposium , pp. 136-144
    • Krieger, G.1
  • 4
    • 0032183002 scopus 로고    scopus 로고
    • Very-fast transmission line pulsing of integrated structures and the charge device model
    • Gieser H., Haunschild M. Very-fast transmission line pulsing of integrated structures and the charge device model. IEEE Trans. Components, Packaging Manufac. Techn. - Part C. 21(4):1998;278-285.
    • (1998) IEEE Trans. Components, Packaging Manufac. Techn. - Part C , vol.21 , Issue.4 , pp. 278-285
    • Gieser, H.1    Haunschild, M.2
  • 5
    • 0032309320 scopus 로고    scopus 로고
    • Bipolar model extension for MOS transistors considering gate coupling effects in the HBM ESD domain
    • H. Wolf, H. Gieser, W. Stadler, Bipolar model extension for MOS transistors considering gate coupling effects in the HBM ESD domain, Proceedings of the EOS/ESD Symposium, 1998, pp. 271-280.
    • (1998) Proceedings of the EOS/ESD Symposium , pp. 271-280
    • Wolf, H.1    Gieser, H.2    Stadler, W.3
  • 7
    • 0041044212 scopus 로고
    • ESD-monitor circuit - A tool to investigate the susceptibility and failure mechanisms of the CDM
    • Bordeaux
    • P. Egger, R. Kropf, H. Gieser, ESD-monitor circuit - a tool to investigate the susceptibility and failure mechanisms of the CDM, Proceedings of the 6th ESREF, Bordeaux, 1995, pp. 223-228.
    • (1995) Proceedings of the 6th ESREF , pp. 223-228
    • Egger, P.1    Kropf, R.2    Gieser, H.3
  • 11
    • 0006001718 scopus 로고
    • Compact electro-thermal simulation of ESD-protection elements
    • Bordeaux
    • C. Russ, H. Gieser, P. Egger, S.Irl, Compact electro-thermal simulation of ESD-protection elements, Proceedings of the ESREF Symposium, Bordeaux, 1993, pp. 395-400.
    • (1993) Proceedings of the ESREF Symposium , pp. 395-400
    • Russ, C.1    Gieser, H.2    Egger, P.3    S.irl4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.