FIT/PVL circuit-parameter extraction for general electromagnetic devices

IEEE Transactions on Magnetics

Volumn 36, Issue 4 I, 2000, Pages 1421-1425

  Munteanu, Irina ^a   Wittig, Tilmann ^b   Weiland, Thomas ^b   Ioan, Daniel ^a  

^a UNIVERSITY POLITEHNICA OF BUCHAREST   (Romania)

^b DARMSTADT UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BOUNDARY CONDITIONS; ELECTROMAGNETIC FIELDS; EQUIVALENT CIRCUITS; INTEGRATION; STATE SPACE METHODS;

FINITE INTEGRATION TECHNIQUE (FIT); PADE VIA LANCZOS (PVL) TECHNIQUES;

ELECTRIC NETWORK ANALYSIS;

EID: 0034221448     PISSN: 00189464     EISSN: None     Source Type: Journal    
DOI: 10.1109/20.877705     Document Type: Article

References (13)