Design and performances of a compensated mean-timer

IEEE Transactions on Nuclear Science

Volumn 47, Issue 3 PART 2, 2000, Pages 839-843

  Dzahini, D ^a   Pouxe, J ^a   Rossetto, O ^a  

^a CENTRE DE CALCUL DE L INSTITUT NATIONAL DE PHYSIQUE NUCLEAIRE ET DE PHYSIQUE DES PARTICULES   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; EMITTER COUPLED LOGIC CIRCUITS; INTEGRATED CIRCUIT LAYOUT; PERFORMANCE; PHASE LOCKED LOOPS; THERMAL EFFECTS; VARIABLE FREQUENCY OSCILLATORS;

COMPENSATION SYSTEM; DRIFT CANCELLATION SYSTEM; INTEGRATED MEAN TIMER; THERMAL DRIFT;

TIMING CIRCUITS;

EID: 0034204678     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/23.856527     Document Type: Article

References (5)

1. Alan R. Baldwind, Richard Madey : "An analog mean-timer circuit for use with large volume scintillator counters", Nuclear Instruments and Methods vol. 171 (1980), pp 149-152.
2. H. P. Von Gunten et al. : "A fast analog mean-timer", Nuclear Instruments and Methods in physics research A234 (1985), pp 521-516.
3. A. Cavestro, et al. : "An analog mean-timer for long scintillator counters", Nuclear Instruments and Methods in physics research A305 (1991), pp 488-491.
4. J. Chapman, John Mann : "Digital mean-timer for the straw tube tracking system at SDC", IEEE Transaction on Nuclear Science, Vol 40, no4, August 1993, p. 794.
5. David K. Johns, Ken Martin : "Analog integrated circuit design", John Wiley & sons ed.