A method for fault diagnosis in linear electronic circuits

International Journal of Circuit Theory and Applications

Volumn 28, Issue 3, 2000, Pages 245-262

  Tadeusiewicz, M ^a   Korzybski, M ^a  

^a LODZ UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

Fault diagnosis; Linear circuits

Indexed keywords

CAPACITORS; ELECTRIC CURRENTS; ELECTRIC NETWORK ANALYSIS; PARAMETER ESTIMATION; PROBLEM SOLVING; RESISTORS;

FAULT DIAGNOSIS; LINEAR ELECTRONIC CIRCUITS;

ELECTRIC FAULT LOCATION;

EID: 0034179561     PISSN: 00989886     EISSN: None     Source Type: Journal    
DOI: 10.1002/(SICI)1097-007X(200005/06)28:3<245::AID-CTA103>3.0.CO;2-X     Document Type: Article

References (9)

1. Node - Fault diagnosis and a design of testability
2. A unified decomposition approach for fault location in large analog networks
3. Mixed integer programming method for faulty diagnosis of linear analogue circuits
4. Automatic fault diagnosis method for resistive networks using multiple excitations
5. Multiple-fault location of analog circuits
6. Multiple fault location in AC circuits
7. A method for fault location and parameter identification in linear circuits (in Polish)