New architecture of cascaded oversampling sigma-delta modulators

Tien Tzu Hsueh Pao/Acta Electronica Sinica

Volumn 28, Issue 2, 2000, Pages 68-71

  Wang, Xuesheng ^a   Qin, Wei ^a   Ling, Xieting ^a   Zheng, Zengyu ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

CASCADE CONNECTIONS; COMPUTER SIMULATION; DESIGN; ELECTRIC PROPERTIES; NETWORKS (CIRCUITS);

CASCADE; SIGMA DELTA MODULATOR; TIME INTERLEAVED MODULATOR;

MODULATORS;

EID: 0034138787     PISSN: 03722112     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (7)