Two systolic architectures for modular multiplication

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 8, Issue 1, 2000, Pages 103-107

  Tsai, Wei Chang ^a   Shung, C Bernard ^a   Wang, Sheng Jyh ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CRYPTOGRAPHY; DIGITAL ARITHMETIC; SECURITY OF DATA;

MODULAR MULTIPLICATION;

SYSTOLIC ARRAYS;

EID: 0034135613     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.820767     Document Type: Article

References (13)

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