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Volumn 9, Issue 1, 2000, Pages 6-11

Optimum design parameters for different patterns of CB-structure

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BREAKDOWN OF SOLIDS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; OPTIMIZATION; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DOPING;

EID: 0033908218     PISSN: 10224653     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (8)

References (6)
  • 3
    • 0032256942 scopus 로고    scopus 로고
    • A new generation of high voltage MOSFETs breaks the limit line of silicon
    • G. Deboy, et al., "A new generation of high voltage MOSFETs breaks the limit line of silicon", Proc. IEDM 1998, pp.683-686, 1998.
    • (1998) Proc. IEDM 1998 , pp. 683-686
    • Deboy, G.1
  • 4
    • 0032119069 scopus 로고    scopus 로고
    • Theory of a novel voltage sustaining (CB) layer for power devices
    • Chen X.B., "Theory of a novel voltage sustaining (CB) layer for power devices", Chinese Journal of Electronics, Vol.7, No.3, pp.211-216, 1998.
    • (1998) Chinese Journal of Electronics , vol.7 , Issue.3 , pp. 211-216
    • Chen, X.B.1
  • 6
    • 0001695018 scopus 로고
    • Calculation of avalanche breakdown voltage of silicon p-n junctions
    • W. Fulop, "Calculation of avalanche breakdown voltage of silicon p-n junctions", Solid-State Electronics, Vol.10, pp.39-47, 1967.
    • (1967) Solid-State Electronics , vol.10 , pp. 39-47
    • Fulop, W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.