Performance and functional verification of microprocessors

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2000, Pages 58-63

  Bose, Pradip ^a   Abraham, Jacob A ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; ERRORS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; PERFORMANCE;

DESIGN FOR VERIFIABILITY; FUNCTIONAL VERIFICATION; PERFORMANCE VERIFICATION; PRESILICON MODELS; REGISTER TRANSFER LEVEL; VERILOG HARDWARE DESCRIPTION LANGUAGE;

MICROPROCESSOR CHIPS;

EID: 0033904948     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (31)