Two-phase boosted voltage generator for low-voltage giga-bit drams

IEICE Transactions on Electronics

Volumn E83-C, Issue 2, 2000, Pages 266-269

  Kim, Young Hee ^a   Nam, Jong Ki ^a   Lee, Sang Hoon ^a  

^a Pohang University of Science and Technology (POSTECH)   (South Korea)

Author keywords

Boosted voltage generator; Charge pump; Giga bit drams; Low voltage

Indexed keywords

COMPUTER SIMULATION; DYNAMIC RANDOM ACCESS STORAGE; ELECTRIC CURRENTS; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUITS; MOSFET DEVICES; OSCILLATORS (ELECTRONIC);

BOOSTED VOLTAGE GENERATOR; CHARGE PUMP CIRCUIT; MAXIMUM GATE OXIDE VOLTAGE;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033902543     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (3)

1. Y. Nakagome, H. Tanaka, K. Takeuchi, E. Kume, Y. Watanabe, T. Kaga, Y. Kawamoto, F. Murai, R. Izawa, D. Hisamoto, T. Kisu, T. Nishida, E. Takcda, and K. Itoh, "An expérimental 1.5V 61-Mb DRAM," IEEE J. Solid-State Circuits, vol.26, pp.4G5-472, April 1991.
2. T. Yamagata, S. Tomishima, M. Tsukude, T. Tsuruda, Y. Hashizume, and K. Arimoto, "Low voltage circuit design techniques for battery-operated and/or giga-scale DRAM's," IEEE J. Solid-State Circuits, vol.30, pp.1183-1188, Nov. 1995.
3. P. Favrat, P. Deval, and M.J. Dcclercq, "A high-efficiency CMOS voltage doubler," IEEE J. Solid-State Circuits, vol.33, pp.410-416, March 1998.