Cost trade-offs in system on chip designs

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2000, Pages 178-184

  Khare, J ^a   Heineken, H T ^a   d'Abreu, M ^a  

^a Level One Communications   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COSTS; DYNAMIC RANDOM ACCESS STORAGE; LOGIC CIRCUITS; MICROPROCESSOR CHIPS; TRANSISTORS;

SYSTEM ON CHIP; TRADEOFFS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033902298     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)