Pipeline reconfigurable FPGAs

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 24, Issue 2, 2000, Pages 129-146

  Schmit, Herman H ^a   Cadambi, Srihari ^a,c   Moe, Matthew ^a   Goldstein, Seth C ^b,d  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b Carnegie Mellon University   (United States)

^c UNIVERSITY OF MASSACHUSETTS   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS PROGRAMMING; DIGITAL SIGNAL PROCESSING; PIPELINE PROCESSING SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS);

RECONFIGURABLE COMPUTING;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0033902168     PISSN: 09225773     EISSN: None     Source Type: Journal    
DOI: 10.1023/a:1008137204598     Document Type: Article

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