Gain error correction technique for pipelined analogue-to-digital converters

Electronics Letters

Volumn 36, Issue 7, 2000, Pages 617-618

  Siragusa, E J ^a   Galton, I ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ERROR ANALYSIS; ERROR CORRECTION; PIPELINE PROCESSING SYSTEMS; SIGNAL DISTORTION; SIGNAL TO NOISE RATIO;

GAIN ERROR CORRECTION (GEC) TECHNIQUES; SIGNAL TO NOISE AND DISTORTION (SINAD); SPURIOUS-FREE-DYNAMIC RANGE (SFDR);

ANALOG TO DIGITAL CONVERSION;

EID: 0033893202     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20000501     Document Type: Article

References (2)

1. LEWIS, S.H., and GRAY, P.R.: 'A pipelined 5-Msample/s 9-bit analog-to-digital converter', IEEE J. Solid State Circuits, 1987, SSC-22, (6), pp. 954-961
2. GALTON, I.: 'Dynamic noise cancellation in pipelined analog-to-digital converters', to be published in IEEE Trans. Circuits Syst. II,