Estimation of switching noise on power supply lines in deep sub-micron CMOS circuits

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2000, Pages 168-173

  Zhao, Shiyou ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CAPACITORS; COMPUTER SIMULATION; ELECTRIC BREAKDOWN; ELECTRIC LINES; ELECTRIC POWER SUPPLIES TO APPARATUS; PROBABILITY; SPURIOUS SIGNAL NOISE; VLSI CIRCUITS;

DECOUPLING CAPACITORS; DEEP SUBMICRON CIRCUITS; LUMPED INDUCTANCE; LUMPED RESISTANCE; POWER SUPPLY LINES; SOFTWARE PACKAGE HSPICE; SWITCHING NOISE;

CMOS INTEGRATED CIRCUITS;

EID: 0033893062     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)