CMOS high-frequency switched-capacitor filters for telecommunication applications

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 2, 2000, Pages 212-220

  Moon, Un Ku ^a,b  

^a LUCENT TECHNOLOGIES   (United States)

^b Oregon State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ATTENUATION; CAPACITORS; SIGNAL TO NOISE RATIO; SWITCHED FILTERS; TELECOMMUNICATION LINKS;

SWITCHED-CAPACITOR FILTERS;

CMOS INTEGRATED CIRCUITS;

EID: 0033887853     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.823446     Document Type: Article

References (19)

1. J. Rijns and H. Wallinga, "Spectral analysis of double-sampling switched-capacitor filters," IEEE Trans. Circuits Syst., vol. 38, pp. 1269-1279, Nov. 1991.
2. W. A. Rutala, M. F. Gergen, and D. J. Weber, "Comparative evaluation of the sporicidal activity," Amer. J. Infect. Contr., vol. 26, no. 4, pp. 393-398, May 1998.
3. F. E. J. Girling and E. F. Good, "The leapfrog or active-ladder synthesis," Wireless World, vol. 76, pp. 341-345, 1979.
4. M. Tawfik, C. Terrier, C. Caillon, and J. Borel, "Exact design of switched capacitor band pass ladder filters," in Proc. IEEE Int. Symp. Circuits, May 1983, pp. 793-796.
5. S. O. Scanlan, "Analysis and synthesis of switched-capacitor state-variable filter," IEEE Trans. Circuits Syst., vol. CAS-28, pp. 85-93, Feb. 1981.
6. J. Taylor, "Exact design of elliptic switched-capacitor filters by synthesis," Electron. Lett., vol. 18, no. 19, pp. 807-809, Sept. 16, 1982.
7. M. Lee, G. Temes, C. Chang, and M. Ghaderi, "Bilinear switched-capacitor ladder filters," IEEE Trans. Circuits Syst., vol. CAS-28, pp. 811-822, Aug. 1981.
8. R. Gregorian and G. Temes, Analog MOS Integrated Circuits for Signal Processing. New York: Wiley, 1986.
9. R. Datar and A. Sedra. "Exact design of strays-insensitive switched-capacitor ladder filters," IEEE Trans. Circuits Syst., vol. CAS-30, pp. 888-898, Dec. 1983.
10. A. Sedra and M. Snelgrove, "Switched-capacitor filter synthesis," in Design of Analog-Digital VLSI Circuits for Telecommunications and Signal Processing, 2nd ed. Englewood Cliffs, NJ: Prentice-Hall, 1994, ch. 7.
11. A. Baschirotto, F. Montecchi, and R. Castello, "A 15-MHz 20-mW BiCMOS switched-capacitor biquad operating with 150 Ms/s sampling frequency," IEEE J. Solid-State Circuits, vol. 30, pp. 1357-1366, Dec. 1995.
12. L. Larson and G. Temes, "Switched-capacitor building-blocks with reduced sensitivity to finite amplifier gain, bandwidth, and offset voltage," in Proc. IEEE Int. Symp. Circuits and Systems, May 1987, pp. 334-338.
13. Y. Huang, G. C. Temes, and P. Ferguson, "Experimental results on reduced harmonic distortion with correlated double sampling," Dig. Symp. VLSI Circuits, pp. 224-227, June 1998.
14. N. Sooch, "MOS cascode current mirror," U.S. Patent 4 550 284, Oct. 1985.
15. G. Fischer and G. Moschytz, "Frequency limitations of SC networks," in Proc. Eur. Conf. Circuit Theory and Design, Sept. 1983, pp. 300-305.
16. J. H. Fischer, "Modeling switched-capacitor filters and Δ-Σ converters in ADVICE," Lucent Technologies Bell Labs Internal Memo. 538 832 000-970 519-01 IM, May 19, 1997.
17. T. Misawa, "Analysis of switched capacitor circuits with classical computer simulation program," AT&T Bell Labs Tech. Memo., May 1981.
18. J. H. Fischer, "Noise sources and calculation techniques for switched capacitor filters," IEEE J. Solid-State Circuits, vol. SC-17, pp. 742-819, Aug. 1982.
19. J. Vlach and A. Opal, "WATSNAP, program for analysis of externally clocked linear switched networks," Department of Electrical and Computer Engineering, University of Waterloo , 1992.