Four-quadrant CMOS current-mode multiplier independent of device parameters

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 47, Issue 5, 2000, Pages 473-477

  Tanno, Koichi ^a   Ishizuka, Okihiko ^a   Tang, Zheng ^a  

^a UNIVERSITY OF MIYAZAKI   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC RESISTANCE; ERRORS; INTEGRATED CIRCUIT LAYOUT; LINEAR INTEGRATED CIRCUITS; LSI CIRCUITS; MOSFET DEVICES;

ANALOG INTEGRATED CIRCUIT; CURRENT MODE MULTIPLIER; POWER CONSUMPTION; TOTAL HARMONIC DISTORTION;

MULTIPLYING CIRCUITS;

EID: 0033750786     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.842116     Document Type: Article

References (10)

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