SIFAR: static test compaction for synchronous sequential circuits based on single fault restoration

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2000, Pages 205-212

  Lin, Xijiang ^a   Cheng, Wu Tung ^a   Pomeranz, Irith ^a   Reddy, Sudhakar M ^a  

^a MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ASYNCHRONOUS SEQUENTIAL LOGIC; C (PROGRAMMING LANGUAGE); COMPUTER SIMULATION; DEFECTS; FAILURE ANALYSIS;

MULTIPLE PATTERN SINGLE FAULT SIMULATOR; SINGLE FAULT RESTORATION BASED COMPACTION;

INTEGRATED CIRCUIT TESTING;

EID: 0033743220     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (16)