Modelling delay and crosstalk in VLSI interconnect for electrical simulation

Electronics Letters

Volumn 36, Issue 10, 2000, Pages 862-864

  Maffezzoni, P ^a   Brambilla, A ^a  

^a POLITECNICO DI MILANO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; CROSSTALK; ELECTRIC NETWORK SYNTHESIS; ELECTRIC RESISTANCE MEASUREMENT; INTERCONNECTION NETWORKS; ITERATIVE METHODS; LAPLACE TRANSFORMS; LUMPED PARAMETER NETWORKS; MICROPROCESSOR CHIPS;

MULTI-PORT EQUIVALENT NETWORKS; PICARD-CARSON METHOD; SOFTWARE PACKAGE SPICE;

VLSI CIRCUITS;

EID: 0033742566     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20000676     Document Type: Article

References (2)

1. MAFFEZZONI, P., and BRAMBILLA, A.: 'An efficient method to simulate time delays of distributed interconnections in VLSI circuits', Electron. Lett., 1999, 35, (12), pp. 976-977
2. GHAUSI, M.S., and KELLY, J.J.: 'Introduction to distributed-parameter networks with application to integrated circuits' (Holt, Rinehart and Winston, New York, 1968)