Design issues on high-speed high-resolution track-and-holds in BiCMOS technology

IEE Proceedings: Circuits, Devices and Systems

Volumn 147, Issue 2, 2000, Pages 100-106

  Fiocchi, C ^a   Gatti, U ^b   Maloberti, F ^c  

^a Mikron AG   (Italy)

^b Italtcl SpA   (Italy)

^c UNIVERSITY OF PAVIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BIPOLAR TRANSISTORS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; FREQUENCIES; PHASE SHIFTERS; SIGNAL DISTORTION;

BICMOS TECHNOLOGY; OUTPUT BUFFER; TRACK AND HOLD DESIGN;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033741064     PISSN: 13502409     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cds:20000200     Document Type: Article

References (16)

1. SCHWEBER, B.: 'Converters restructure communication architecture', EDN, 1995, pp. 51-64
2. ROHMER, G.: 'An 800 MSps track and hold using a 0.3 pm AlGaAs-HEMT-technology'. IEEE GaAs symposium, Dig. tech. papers, 1994, pp. 236 ff.
3. POULTON, K., CORCORAN, J., and HORNAK, T.: 'A 1-GHz 6-bit ADC system', IEEEJ, Solid-Stale Circuits, 1987, 22, pp. 962-970
4. PREGARDIER, B., LANFMANN, U., and HILLERY, W.J.: 'A 1 Gsample/s 8 b silicon bipolar track and hold 1C. ISSCC digest of technical papers, 1995, pp. 58-59
5. RAZAVI, B.: 'Design of a 100-MHz 10-mW 3-V sample-and-hold amplifier in digital bipolar technology', IEEE J. Solid-Slate Circuits, 1995, 30, pp. 724-730
6. RAZAVI, B.: 'A 200 MHz 15-mW BiCMOS sample-and-hold amplifier with 3 V supply', IEEEJ. Solid-State Circuits, 1995, 30, pp. 1326-1332
7. PETSCHACHER, R., ZOJER, B., ASTEGHER, B., JESSNER, H., and LECHNER, A.: 'A 10-b 75-MSPS subranging A/D converter with integrated sample and hold', IEEE J. Solid-State Circuits, 1990, 25, pp. 1339-1346
8. VORENKAMP, P., and VERDAASDONK, J.: 'Fully bipolar, 120-Msample/s 10-b track-and-hold circuit', IEEE J. Solid-State Circuits, 1992, 27, pp. 988-992
9. SONE, K.: ' A lOb 100 Ms/s pipelined subranging BiCMOS ADC. ISSCC digest of technical papers, 1993, pp. 66-67
10. COLLERAN, W.T., and ABIDI, A.: 'A 10-b, 75-MHz two-stage pipelined bipolar A/D converter', IEEE J. Solid-State Circuits, 1993, 28, pp. 1187-1199
11. MORDEN, F., and GOSSER, R.: 'An 12b 50 MSample/s two-stage A/D converter'. ISSCC digest of technical papers, 1995, pp. 278-279
12. FIOCCHI, C, GATTI, U., and MALOBERTI, F.: 'A 10-bit 250-MHz BiCMOS track-and-hold'. ISSCC digest of technical papers, 1997, pp. 144-145
13. VORENKAMP, P., and ROC VERS, R.: 'A 12b 50 Msample/s cascaded folding and interpolating ADC'. ISSCC digest of technical papers, 1997, pp. 134-135
14. BAUMHEINRICH, T., PREGARDIER, B., and LANGMANN, U.: 'A 1-Gsample/s 10-b full Nyquist silicon bipolar track and hold 1C, IEEEJ. Solid-State Circuits. 1997, 32, pp. 1951-1960
15. RAZAVI, B.: 'Principles of data conversion system design' (IEEE Press, 1995)
16. CAIULO, G., FIOCCHI, C, GATTI, U., and MALOBERTI, F.: 'On the design of high-speed high-resolution track and holds'. Proceedings ofISCAS'96, 1996, pp. 73-76