Validation of PowerPC custom memories using symbolic simulation

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2000, Pages 9-14

  Krishnamurthy, Narayanan ^a   Martin, Andrew K ^a   Abadir, Magdy S ^a   Abraham, Jacob A ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMPUTER SIMULATION; EQUIVALENCE CLASSES; EVALUATION; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS; SEMICONDUCTOR STORAGE;

EMBEDDED MEMORIES; FORMAL EQUIVALENCE CHECKING TOOLS; POWERPC CUSTOM MEMORIES; REGISTER TRANSFER LEVEL; SOFTWARE PACKAGE VERSYS; SYMBOLIC SIMULATION; SYMBOLIC TRAJECTORY EVALUATION;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0033734074     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (13)