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Volumn , Issue , 2000, Pages 231-236
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Effective defect-oriented BIST architecture for high-speed phase-locked loops
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Author keywords
[No Author keywords available]
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Indexed keywords
BUILT-IN SELF TEST;
CIRCUIT THEORY;
COMPUTER SIMULATION;
ELECTRIC FREQUENCY MEASUREMENT;
ELECTRIC IMPEDANCE;
FAULT TREE ANALYSIS;
INTEGRATED CIRCUIT TESTING;
LINEAR NETWORKS;
MONTE CARLO METHODS;
VARIABLE FREQUENCY OSCILLATORS;
CHARGE BASED FREQUENCY MEASUREMENT TECHNIQUE;
CIRCUIT UNDER TEST;
DEFECT ORIENTED TESTING;
PHASE LOCKED LOOPS;
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EID: 0033733911
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Article |
Times cited : (24)
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References (11)
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