ItaniumTM processor clock design

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2000, Pages 94-98

  Desai, Utpal ^a   Tam, Simon ^a   Kim, Robert ^a   Zhang, Ji ^a   Rusu, Stefan ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK SYNTHESIS; ELECTRIC NETWORK TOPOLOGY; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS; SEMICONDUCTING SILICON; TIMING CIRCUITS;

CLOCK ROUTING;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033726536     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)