Bus encoding for low-power high-performance memory systems

Proceedings - Design Automation Conference

Volumn , Issue , 2000, Pages 800-805

  Chang, Naehyuck ^a   Kim, Kwanho ^a   Cho, Jinsung ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DYNAMIC RANDOM ACCESS STORAGE; ELECTRIC POWER SUPPLIES TO APPARATUS; LOGIC CIRCUITS; MICROCOMPUTERS; NETWORK PROTOCOLS; NUMERICAL ANALYSIS; RAPID PROTOTYPING;

BUS ENCODING; LOW POWER HIGH PERFORMANCE MEMORY SYSTEMS; TRACE DRIVEN SIMULATION;

COMPUTER CIRCUITS;

EID: 0033720602     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/337292.337778     Document Type: Conference Paper

References (10)