Prototype low power WTA circuits for programmable neural networks

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2000, Pages

  Wawryn, Krzysztof ^a   Strzeszewski, Bogdan ^a  

^a KOSZALIN UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; NEURAL NETWORKS; VLSI CIRCUITS;

BIAS CURRENTS; WINNER TAKE ALL (WTA) CIRCUITS;

LOGIC CIRCUITS;

EID: 0033719752     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2000.857611     Document Type: Conference Paper

References (5)