Merging hardware and software: Intellectual property cores for internet applications

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2000, Pages 537-540

  Bollano, G ^a   Claretto, S ^a   Filippi, E ^a   Torielli, A ^a   Turolla, M ^a  

^a CSELT   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ASSOCIATIVE STORAGE; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; INTELLECTUAL PROPERTY; INTERNET;

INTELLECTUAL PROPERTY CORES; LOOKUP FUNCTIONS;

MICROPROCESSOR CHIPS;

EID: 0033713492     PISSN: 08865930     EISSN: None     Source Type: Journal    
DOI: 10.1109/CICC.2000.852725     Document Type: Article

References (5)

1. P. E C. Zukowski Putting Routing Tables in Silicon IEEE Network Magazine Jan 1992
2. E. Filippi Address Lookup solutions for Gigabit Switch/Router Globecom98 Globecom98 Sidney 1998-November-8-12
3. T Ogura 336-Kbit Content Addressable Memory for Highly Parallel Image Processing Proc. CICC Proc. CICC 1996
4. K Schultz Fully-Parallel 25Mhz 2.5Mb CAM Proc. ISSCC98 Proc. ISSCC98 1998