Hardware implementation of 'Supplementary Symmetrical Logic Circuit Structure' concepts

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 2000, Pages 371-376

  Olson, Dan ^a   Current, K Wayne ^a  

^a EDO LLC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CELLULAR ARRAYS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; INTEGRATED CIRCUIT TESTING; LOGIC CIRCUITS; MASKS; ROM;

RADIX CONVERTING READ ONLY MEMORY; SUPPLEMENTARY SYMMETRICAL LOGIC CIRCUIT STRUCTURE; TEST CHIP;

MICROPROCESSOR CHIPS;

EID: 0033706942     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)