Compact adaptive equalizer IC for HIPERLAN system

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2000, Pages

  Wang, Jinn Shyan ^a   Lin, Pei Lung ^a   Sheen, Wern Ho ^a   Sheng, Duo ^a   Huang, Yu Ming ^a  

^a NATIONAL CHUNG CHENG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMMUNICATION CHANNELS (INFORMATION THEORY); EQUALIZERS; FADING (RADIO); FIR FILTERS; INTERSYMBOL INTERFERENCE; LOCAL AREA NETWORKS; LOGIC CIRCUITS; MULTIPATH PROPAGATION; TIMING CIRCUITS;

ADAPTIVE DECISION FEEDBACK EQUALIZERS; ALL DIGITAL PHASE LOCKED LOOPS;

PHASE LOCKED LOOPS;

EID: 0033701580     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2000.856312     Document Type: Conference Paper

References (11)