0.18 um modular triple self-aligned embedded split-gate flash memory

Digest of Technical Papers-Symposium on VLSI Technology

Volumn , Issue , 2000, Pages 120-121

  Mih, Rebecca ^a   Harrington, Jay ^a   Houlihan, Kevin ^a   Lee, Hyun Koo ^a   Chan, Kevin ^a,b   Johnson, Jeffrey ^a,c   Chen, Bomy ^a   Yan, Jiang ^a,d   Schmidt, Andreas ^a,d   Gruensfelder, Christian ^a,d   Kim, Kisang ^a,d   Shum, Danny ^a,d   Lo, Connie ^a,e   Lee, Dana ^a,e   Levi, Amitay ^a,e   Lam, Chung ^a  

^a IBM MICROELECTRONICS   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

^c IBM   (United States)

^d INFINEON TECHNOLOGIES   (United States)

^e SILICON STORAGE TECHNOLOGY INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; MASKS; SEMICONDUCTOR DEVICE STRUCTURES;

CHANNEL HOT ELECTRON (CHE) PROGRAM; SPLIT GATE FLASH MEMORY CELLS; TRIPLE SELF-ALIGNED PROCESSES;

GATES (TRANSISTOR);

EID: 0033701271     PISSN: 07431562     EISSN: None     Source Type: Journal    
DOI: 10.1109/VLSIT.2000.852793     Document Type: Article

References (3)

1. S. Kianian Symp. VLSI Tech. 71 72 Symp. VLSI Tech. 1994
2. B.J. Ahn IEEE EDL 19 438 440 Nov. 1998
3. J.V. Houdt IEEE ED 39 1150 1156 May 1992