Novel logic compatible gain cell with two transistors and one capacitor

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2000, Pages 168-169

  Ikeda, N ^a   Terano, T ^a   Moriya, H ^a   Emori, T ^a   Kobayashi, T ^a  

^a SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CONSUMER ELECTRONICS; COST EFFECTIVENESS; DYNAMIC RANDOM ACCESS STORAGE; MOS CAPACITORS;

STATIC RANDOM ACCESS MEMORY (SRAM); SYSTEM-ON-A-CHIP (SOC);

VLSI CIRCUITS;

EID: 0033701263     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)