Fast methods for extraction and sparsification of substrate coupling

Proceedings - Design Automation Conference

Volumn , Issue , 2000, Pages 738-743

  Kanapka, Joe ^a   Phillips, Joel ^b   White, Jacob ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; ELECTRIC CONDUCTANCE; ELECTRIC CONTACTS; ELECTRIC RESISTANCE; MATRIX ALGEBRA; RESISTORS; SUBSTRATES; WAVELET TRANSFORMS;

CONTACT CONDUCTANCE MATRIX; SUBSTRATE COUPLING; SYSTEMS ON CHIP DESIGN;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033700099     PISSN: 0738100X     EISSN: None     Source Type: Journal    
DOI: 10.1109/DAC.2000.855412     Document Type: Article

References (14)

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