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Volumn , Issue , 2000, Pages 601-606
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Optimizing sequential verification by retiming transformations
a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
FINITE AUTOMATA;
SEQUENTIAL CIRCUITS;
TIMING CIRCUITS;
BINARY DECISION DIAGRAMS;
RETIMING TRANSFORMATIONS;
SEQUENTIAL VERIFICATION;
DECISION THEORY;
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EID: 0033700098
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/337292.337591 Document Type: Conference Paper |
Times cited : (9)
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References (9)
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