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Volumn 1, Issue , 2000, Pages 393-399
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Practical die stress model and its applications in flip-chip packages
a
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Author keywords
[No Author keywords available]
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Indexed keywords
BENDING (DEFORMATION);
COMPUTER SIMULATION;
COOLING;
FINITE ELEMENT METHOD;
FLIP CHIP DEVICES;
INTEGRATED CIRCUIT LAYOUT;
INTEGRATED CIRCUIT TESTING;
RELIABILITY;
SOLDERED JOINTS;
THERMAL STRESS;
BENDING STRESS;
BI-MATERIAL PLATE MODEL;
DIE CURVATURE;
FLIP CHIP PACKAGES;
ELECTRONICS PACKAGING;
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EID: 0033694040
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Article |
Times cited : (15)
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References (10)
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