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Volumn 1, Issue , 2000, Pages 393-399

Practical die stress model and its applications in flip-chip packages

Author keywords

[No Author keywords available]

Indexed keywords

BENDING (DEFORMATION); COMPUTER SIMULATION; COOLING; FINITE ELEMENT METHOD; FLIP CHIP DEVICES; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; RELIABILITY; SOLDERED JOINTS; THERMAL STRESS;

EID: 0033694040     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article
Times cited : (15)

References (10)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.